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SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
Table 2-11. Serial Peripheral Interface (SPI) Terminal Functions (continued)
SIGNAL
NAME
NO.
TYPE (1)
(2)
OTHER (3)
(4)
DESCRIPTION
This pin is multiplexed between LCD Bridge, I2S2, GPIO, and SPI.
LCD_D[10]/
I2S2_RX/
GP[20]/
SPI_RX
N11
I/O/Z
IPD
DV DDIO
BH
Mux control via the PPMODE bits in the EBSR.
For SPI this pin is SPI receive data input.
The IPD resistor on this pin can be enabled or disabled via the PDINHIBR3 register.
Copyright ? 2010–2013, Texas Instruments Incorporated
Product Folder Links: TMS320C5515
Device Overview
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